Vivanco 10-100MB FAST ETHERNET SWITCH 5 PORTS - PROGRAMMING Spécifications

ProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityDP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISE

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comSIGNAL NAME TYPE PIN # DESCRIPTIONRD-, RD+ I/O 13 Differential re

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20155 Specifications5.1 Absolute Maximum Ratings(1)(2)MIN MAX UNITSup

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com5.5 DC SpecificationsPINPARAMETER TEST CONDITIONS MIN TYP MAX UNI

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20155.6 AC Timing RequirementsPARAMETER DESCRIPTION NOTES MIN TYP MAX

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comAC Timing Requirements (continued)PARAMETER DESCRIPTION NOTES MIN

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015AC Timing Requirements (continued)PARAMETER DESCRIPTION NOTES MIN

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comAC Timing Requirements (continued)PARAMETER DESCRIPTION NOTES MIN

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Figure 5-1. Power-Up TimingFigure 5-2. Reset TimingCopyright © 20

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comFigure 5-3. MII Serial Management TimingFigure 5-4. 100 Mb/s MII

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Figure 5-7. 100BASE-TX Transmit Packet Deassertion TimingFigure 5

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com1.4 Functional Block Diagram2 Introduction Copyright © 2007–2015,

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comFigure 5-10. 100BASE-TX Receive Packet Deassertion TimingFigure 5

T2.17.1T2.17.2T2.17.31 0 1 0 1 0 1 0 1 0 1 11st SFD Bit Decoded0000 Preamble SFD DataRXD[3:0]RX_DVRX_CLKCRSTPRDrT2.15.1T2.15.2TX_CLKTX_ENTXDPMD Output

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comFigure 5-19. 10 Mb/s Heartbeat TimingFigure 5-20. 10 Mb/s Jabber

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Figure 5-24. 100 Mb/s Internal Loopback TimingFigure 5-25. 10 Mb/

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comFigure 5-26. RMII Transmit TimingFigure 5-27. RMII Receive Timing

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Figure 5-30. 100 Mb/s X1 to TX_CLK TimingCopyright © 2007–2015, T

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6 Detailed Description6.1 OverviewThe device is 10/100 Mbps Ether

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.2 Functional Block DiagramCopyright © 2007–2015, Texas Instrume

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.3 Feature DescriptionThis section includes information on the v

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.3.1.2 Auto-Negotiation Register ControlWhen Auto-Negotiation is

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table of Contents1 Introduction ...

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comIf the DP83848VYB completes Auto-Negotiation as a result of Paral

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-2. LED Mode SelectionLED_CFG[1] (bit LED_CFG[0] (bit 5)Mo

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comFigure 6-1. AN Strapping and LED Loading Example6.3.3.2 LED Direc

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.3.6 Energy Detect ModeWhen Energy Detect is enabled and there i

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comIf a collision occurs during a receive operation, it is immediate

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-3. Supported Packet Sizes at ±50ppm ±100ppm For Each Cloc

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comFigure 6-2. Typical MDC/MDIO Read OperationFigure 6-3. Typical MD

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-5. PHY Address MappingPin # PHYAD Function RXD Function42

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.4.6 Half Duplex vs. Full DuplexThe DP83848VYB supports both hal

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.5 Programming6.5.1 ArchitectureThis section describes the opera

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com3 Device ComparisonTable 3-1. Device Features ComparisonDEVICE TE

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comTable 6-6. 4B5B Code-Group Encoding/DecodingDATA CODES0 11110 000

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.5.1.1.2 ScramblerThe scrambler is required to control the radia

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.5.1.2.1 Analog Front EndIn addition to the Digital Equalization

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015In order to ensure quality transmission when employing MLT-3 enco

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comThe DP83848VYB is completely ANSI TP-PMD compliant and includes B

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015In order to maintain synchronization, the descrambler must contin

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.5.1.3.1.1 Half Duplex ModeIn Half Duplex mode the DP83848VYB fu

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015When heartbeat is enabled, approximately 1 µs after the transmiss

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.5.1.3.9 TransmitterThe encoder begins operation when the Transm

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-8. Register TableRegister Name Addr Tag Bit 15 Bit 14 Bit

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20154.1 Pin LayoutPTB Package48-Pin HLQFPTop ViewCopyright © 2007–201

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comTable 6-8. Register Table (continued)Register Name Addr Tag Bit 1

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.6.1.1 Register DefinitionIn the register definitions under the

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comTable 6-9. Basic Mode Control Register (BMCR), address 0x00h (con

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-10. Basic Mode Status Register (BMSR), address 0x01h (con

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comTable 6-13. Negotiation Advertisement Register (ANAR), address 0x

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-13. Negotiation Advertisement Register (ANAR), address 0x

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.6.1.1.7 Auto-Negotiation Link Partner Ability Register (ANLPAR)

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.6.1.1.8 Auto-Negotiate Expansion Register (ANER)This register c

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comTable 6-17. Auto-Negotiation Next Page Transmit Register (ANNPTR)

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-18. PHY Status Register (PHYSTS), address 10h (continued)

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com4.2 Package Pin AssignmentsVBH48A PIN # PIN NAME VBH48A PIN # PIN

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.6.1.2.2 MII Interrupt Control Register (MICR)This register impl

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-20. MII Interrupt Status and Misc. Control Register (MISR

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.6.1.2.6 100 Mb/s PCS Configuration and Status Register (PCSR)Th

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.6.1.2.7 RMII and Bypass Register (RBR)This register configures

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com6.6.1.2.9 PHY Control Register (PHYCR)This register provides cont

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Table 6-26. PHY Control Register (PHYCR), address 0x19h (continue

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comTable 6-27. 10Base-T Status/Control Register (10BTSCR), address 1

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20156.6.1.2.12 Energy Detect Control (EDCR)This register provides con

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com7 Application, Implementation, and LayoutNOTEInformation in the f

1:11:1RJ45NOTE: CENTER TAP IS PULLED TO VDD*PLACE CAPACITORS CLOSE TO THETRANSFORMER CENTER TAPSRD-RD+TD-TD+0.1 PF*0.1 PF*COMMON MODE CHOKESMAY BE REQ

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015SIGNAL TYPE PIN # DESCRIPTIONNAMETXD_0 I 3 MII TRANSMIT DATA: Tra

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comFigure 7-3. Crystal Oscillator CircuitTable 7-1. 25-MHz Oscillato

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015Figure 7-4. Power Feedback Connection7.2.1.3.1 Power Down and Int

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.comTable 7-4. Magnetics RequirementsPARAMETER TYP UNITS CONDITIONTur

Zo= F60¥ErGln F1.98 ×l2 × H + T0.8 × W + TpG Zo= F87¥Er+ (1.41)Glnl5.98H0.8 W + Tp DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 200

Zdiff= 2 × ZoF1 [email protected] Zdiff= 2 × Zo× F1 [email protected] DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20157.2.3 Application CurvesFigure 7-9. Sample 100 Mb/s Waveform (MLT

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com7.3 Layout7.3.1 Layout Guidelines7.3.1.1 PCB Layout Consideration

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20157.3.1.2 PCB Layer StackingTo meet signal integrity and performanc

PHYComponentOptional 0 : or BeadGround PinVdd PinPCB ViaVddPCBVia0.1 PFPlane Coupling ComponentPHY Component Note:Power/ Ground Planes Voided under

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 20158 Device and Documentation Support8.1 Documentation Support8.1.1

DP83848C,DP83848IDP83848VYB, DP83848YBSNLS266E –MAY 2007–REVISED MARCH 2015www.ti.com4.6 LED InterfaceSee Table 6-2 for LED Mode Selection.SIGNAL NAME

PACKAGE OPTION ADDENDUMwww.ti.com10-Sep-2014Addendum-Page 1PACKAGING INFORMATIONOrderable Device Status(1)Package Type PackageDrawingPins PackageQtyEc

PACKAGE OPTION ADDENDUMwww.ti.com10-Sep-2014Addendum-Page 2

IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and otherch

DP83848C,DP83848IDP83848VYB, DP83848YBwww.ti.comSNLS266E –MAY 2007–REVISED MARCH 2015SIGNAL NAME TYPE PIN # DESCRIPTIONPHYAD0 (COL) S, O, PU 42 PHY AD